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Intel's D1X factory in Hillsboro makes room for more chips and new technologies.
(Jamie Franics, The Oregonian, 2012)
Bill Holt
SANTA CLARA, Calif. -- Intel likes to boast of its technical prowess, its capacity for shrinking features on a computer chip beyond microscopic detail, down to the atomic level, as it wrings ever more computing power out of the tiny circuitry that runs our PCs and laptops.
The process has become so routine, with each successive improvement arriving on a dependable two-year cycle Intel calls “tick-tock,” that the technology industry has come to take it for granted. The technical challenges remain immense, though, as Intel painfully acknowledged last month when it reported a rare screw-up.
Defects in Intel’s newest, 14-nanometer chips were persisting months longer than in previous development cycles. Intel can’t sell defective chips, so it had to hold back until it had its bugs ironed out.
As a result, Intel delayed the launch of its forthcoming “Broadwell” chip into next year – postponing, too, the next generation of advances in chip performance and energy efficiency.
Investment analysts called it a shocking misstep, and it may not be the last. Intel vice president Bill Holt, who oversees the company's manufacturing operations from its Ronler Acres campus in Hillsboro, told shareholders and Wall Street analysts Thursday that the laws of physics are pushing back on Intel's efforts to continue shrinking its circuitry.
"We certainly don't want it to be normal," Holt said in an interview at company headquarters during Intel's annual investor day. But, he continued, "I suspect it would be presumptuous of us to say it wouldn't happen anymore."
That’s an ominous sign for Intel and the rest of the chip industry, which depends on these advances to enable the smarter, speedier computers that have driven the tech sector for four decades – enabling everything from the PC to the smartphone to the Internet itself.
For Intel, these physical limits create both technical and economic challenges that could undermine the company’s basic business model. Holt last week outlined continued improvements through its 7-nanometer technology, still four years off. But he acknowledged Intel is confronting issues it hasn’t faced before.
“Obviously, our 14-nanometer performance demonstrates this is really hard," Holt told investors and analysts.
Intel’s business is built around “Moore’s Law,” coined in 1965 by company co-founder Gordon Moore. Moore theorized that the number of transistors on a computer chip would double roughly every two years.
Most people conceive of the benefits from those improvements in terms of constant improvements in computing power. But there’s another component, just as important: cost.
Smaller circuitry enables smaller microprocessors, which means manufacturers can fit more onto the silicon wafers that serve as chips’ foundation. The resulting cost savings mean chips, and computers, get cheaper even as their capabilities increase.
“Moore’s Law is actually a law of economics,” new Intel chief executive Brian Krzanich told investors Thursday.
Tech pundits have been predicting an end to Moore's Law for decades, but Intel and others have extended it by altering the architecture of the transistor and by reformulating the materials inside a chip. Intel executives acknowledged Thursday that Moore's Law will eventually end, but they gave no indication they expect that any time soon.
“We have no intention of slowing down,” Holt said. “If we slow down, it’ll be just because we can’t keep up.”
The tricks for delaying the end, though, are growing increasingly arduous. Chips consist of tiny layers of circuitry, patterned on the chip’s surface through a photographic process called lithography. The problem is that Intel’s suppliers haven’t been able to devise manufacturing tools to accommodate the smaller circuitry new chips require.
“The fact that we’re not seeing fundamental improvements in the patterning equipment just means that we have to extract more from the existing equipment,” Holt said.
Intel does that by taking each chip through more steps, which extends the time each silicon wafer spends in the factory. That slows down the production process and means Intel needs more manufacturing capacity – an expensive proposition, since chip factories cost several billion dollars apiece.
You can see the physical manifestation of this challenge as you drive through Hillsboro along Highway 26. The massive cranes looming over Intel’s Ronler Acres campus are building the second of two new Intel research factories, known collectively as D1X, where Intel develops each new generation of chip technology.
They’re several times bigger than Intel’s current factories, reflecting both new production technologies Intel plans to implement and the additional space the company needs.
“As there’s more tools and more equipment it fills more space,” Holt said.
Investors cringe every time Intel announces plans for a new factory – its capital spending budget runs around $10 billion annually, gobbling up profits investors would rather have in their pockets. But it’s a necessary investment, Intel maintains, to keep up with the requirements of its business.
And, fortunately for the company, the cost benefits from shrinking chips handily exceed the added investment costs. Intel said it expects a 29 percent drop in the average size of its laptop chips over the next two years.
That means Intel will continue to fill its factories and enjoy the economic benefits of Moore’s Law. But Intel faces other challenges – chiefly, declining demand for personal computers and laptops, the core if its business.
If PC sales continue dropping, it could leave Intel with more production capacity than the market needs and undermine the economic benefits of Moore’s Law.
“It makes sense, mathematically, as long as PC units are really, truly stabilizing. Otherwise you’ll run into a capacity issue,” said Michael McConnell, a Portland investment analyst who follows Intel for Pacific Crest Securities.
Intel will eventually have other ways to extend its cost advantage. A forthcoming lithography tool known as EUV, for extreme ultraviolet, promises patterning improvements. And the second phase of D1X will be the world’s first chip factory building chips on larger, 450-millimeter silicon wafers, whose added capacity could cut production costs by a third.
Both those advances have run into repeated delays due to technical issues associated with EUV and the costs required to develop manufacturing equipment for the larger wafer size.
“Our view on 450 hasn’t changed. It’s still a good thing for the industry,” Holt said Thursday. But he said other manufacturers aren’t as eager, and Intel won’t foot the bill for the new tools by itself.
“We’re not going to do it on our own.” Holt said.
For all Intel’s challenges of keeping up with Moore’s Law, the complexity also creates a competitive advantage for the company. As the world’s largest chipmaker, Intel has more money to invest in new technologies. And it has a lead of 18 months or more on its rivals.
“As hard as it is,” Holt said. “we think it’s going to be hard for everybody else when they get to that point.”
-- Mike Rogoway; twitter: @rogoway; 503-294-7699